;______________________________________
;    ADS1115/CAN 12 bits/4 entrées
;
; Matériel : 	ATtiny 45/85 8MHz 5V
; 				ADS1115 I²C
; (c) sammy76.free.fr
;	V1.0 2016/06/01 Juin 2016
;______________________________________
; V1.0 ESSAI
;        ATtiny45 - 8MHz interne
;             +-\/-+
; 	     PB5 1|-  -|8  Vcc
;		 PB3 2|-  -|7  PB2 SENSELED
;   	 PB4 3|-  -|6  PB1 SDA LCD/ADS1115
;		 GND 4|-  -|5  PB0 SCL LCD/ADS1115
;             +----+
;I2C : Registres utilisés r16 (A),r19 (Adresse I²C), r20 (DATA)

.dseg
.equ	txt=0x60			;Adresse variable du texte

.CSEG
.include "../includes/tn45def.inc"
	;.def	bin16r0=R16
	;.def	bin16r1=R17
	.define F_CPU 8000000 ;8MHz
	
.def	A		= r16	;
.def	digit		= r4	;Digit
.equ  	SENSELED=PB3   ;  SENSELED pin (Output on AVR)
.equ  	ERRORLED=PB4   ;  ERRORLED pin (Output on AVR)
;-----------------------------------------------------------------
	.org 0000
;************************************************
;* Interrupt Vectors				      *
;************************************************
zRESET:			; Reset Handler
	rjmp		ON_RESET
zINT0addr:		; External Interrupt 0
	reti
zPCI0addr:		; Pin change Interrupt Request 0
	reti
zOC1Aaddr:		; Timer/Counter1 Compare Match 1A
	reti
zOVF1addr:		; Timer/Counter1 Overflow
	reti
zOVF0addr:		; Timer/Counter0 Overflow
	reti
zERDYaddr:		; EEPROM Ready
	reti
zACIaddr:		; Analog comparator
	reti
zADCCaddr:		; ADC Conversion ready
	reti
zOC1Baddr:		; Timer/Counter1 Compare Match B
	reti
zOC0Aaddr:		; Timer/Counter0 Compare Match A
	reti
zOC0Baddr:		; Timer/Counter0 Compare Match B
	reti
zWDTaddr:		; Watchdog Time-out
	reti		;rjmp		WDTinterrupt
zUSI_STARTaddr:	; USI START
	reti
zUSI_OVFaddr:	; USI Overflow
	reti
.include 	"../utils/i2c_attiny.inc"
.include 	"bin2asc5.asm"
.include 	"../utils/ADS1115.inc"
.include	"../utils/lcd_.inc"

;______________________________________
;           SETUP
;______________________________________
ON_RESET:
	ldi A, LOW(RAMEND)        	;Setup of stack pointer 0x15F
	out SPL, A
	ldi A, HIGH(RAMEND)
	out SPH, A

	ldi	A,0b10000000		;Attention, ces 2 instructions sont importantes pour le changement de fréquence (sécurité AVR)
	out	CLKPR,A
	ldi	A,0b0000000		;divise par 0le clock RC de 8MHz, donc 8MHz
	out	CLKPR,A
	
	;Eteint le CAN
	cbi	ADCSRA, ADEN		;switch Analog to Digitalconverter OFF

	;rcall	WDT_on			;Set le watchdog
	rcall	WDT_off			;Stop le watchdog

	;Configure les sorties
	;ldi		A, (1<<SENSELED)
	;out		DDRB, A       		; Set output pins
	
	clr		YH
	clr		YL
;______________________________________
;	     BOUCLE PRINCIPALE
;______________________________________
MAIN_LOOP:

	rcall	lcd_init
	rcall	I2CDelay
	ldi 	ZL, LOW(txt3<<1)
	ldi		ZH, HIGH(txt3<<1)
	rcall 	LCD_write_string_sram
	ldi		DATA,0xC0		;Ligne 2 1100 0000 0x40 
	rcall	LCD_DATA_write_cmd

	ldi 	ZL, LOW(txt4<<1)
	ldi		ZH, HIGH(txt4<<1)
	rcall 	LCD_write_string_sram
	ldi		A,2
	rcall	waitseconds
	rcall lcd_init
;	ldi		DATA,0x01		;Clear 0000 0001 0x01 
;	rcall	LCD_DATA_write_cmd
	
	ldi 	ZL, LOW(txt1<<1)
	ldi		ZH, HIGH(txt1<<1)
;	rcall	LCD_write_string
	rcall 	LCD_write_string_sram
BOUCLE:
	rcall 	CLIGNOTE
	
	rcall	ADS1015_read

division:
	clr 	digit
	lsr		rBin1H ;/2
	ror		rBin1L
	ror		digit
	
	lsr		rBin1H ;/4
	ror		rBin1L
	ror		digit
	lsr		rBin1H ;/8
	ror		rBin1L
	ror		digit
;----------------------------------------------

	clr		ZH
	ldi		ZL,txt
	rcall	Bin2ToAsc5
	ldi		DATA,0x2E		;"."
	st		Z+,DATA
	
	rcall	conv_digit
	rcall	Bin2ToAsc5_
    sbiw 	ZL,5	
	rcall	traite_chaine
	
	ldi		DATA,'m'		;"m"
	st		Z+,DATA
	ldi		DATA,'V'		;"V"
	st		Z+,DATA
	ser		DATA
	st		Z+,DATA
	
	ldi		DATA,0xC2		;Ligne 2 1100 0000 0xC0 +2
	rcall	LCD_DATA_write_cmd
	rcall	I2CDelay
	clr		ZH
	ldi		ZL,txt
	rcall	LCD_write_string

	
END:
	ldi		A, 200
	rcall	WaitMiliseconds
	rcall	WaitMiliseconds
	
	RJMP  BOUCLE         ; MAIN LOOP DOES NOTHING (YET).
;______________________________________
;Conversion des décimals
conv_digit:
	;swap	digit
	clr	rBin1H
	clr rBin1L
	ldi XH, high(500)
	ldi XL, low(500)
boucle_digit:
	lsl		digit
	brcc	suite_digit
	add	rBin1L,XL
	adc	rBin1H,XH
	
suite_digit:
	tst		digit
	breq	fin_digit
	lsr		XH ;/2
	ror		XL
	rjmp	boucle_digit
	
fin_digit:
	ret
;______________________________________
traite_chaine:
	mov 	YL,ZL
	ldi		A, 0x20 ;" "
	mov		digit,A
	
traite_chaine_bc:
	ldi		A,5			;5 caractère
	add		A,YL			;
	sub		A,ZL
	
	ld		DATA,Z+
	cp		DATA,digit
	breq	traite_chaine_bc

	rempli_chaine:
	st		Y+,DATA
	ld		DATA,Z+
	dec	A
	brne rempli_chaine

	dec		ZL
	dec		ZL
	dec		ZL
	st		Z+,digit

	ret
;______________________________________
CLIGNOTE:
	push 	A
	sbi		DDRB,SENSELED
	SBI   	PORTB,SENSELED	;Allume LED
	ldi		A, 200			;200ms
	rcall	WaitMiliseconds
	CBI   	PORTB,SENSELED	;ETeind LED
	pop		A
	ret
;------------------------------------------------------------------

; Interruption du timeout du watchdog. On retourne simplement juste après le "sleep" !
WDTinterrupt:
	reti

;***** Include modules
.include	"../utils/watchdog.inc"
.include 	"../utils/wait.inc"

txt1: 	.db "   Mesure  ",0xFF
txt3:	.db " sammy76.free.fr ",0xFF
txt4:	.db "V1.00:%DAY%.%MONTH%.%YEAR% %HOUR%:%MINUTE% ",0xFF

;.eseg
;.org 0x0
;.db "sammy76.free.fr "
;.db "V1.00:%DAY%.%MONTH%.%YEAR% %HOUR%:%MINUTE%"